Chip-level tests that CHERI capability violations raise the correct exceptions through the CVA6-CHERI pipeline. CHERI firmware only. Both V2, placeholders registered.
Testpoints:
chip_cheri_exception (cheri_exception_test_cheri): a tag violation (dereference a capability whose tag was cleared) and a bounds violation (load one byte past the upper bound) each raise a CHERI fault; the handler confirms mcause encodes a CHERI exception and the offending capability register is identified in the CHERI fault-info CSR.chip_cheri_pcc_bounds (cheri_pcc_bounds_test_cheri): construct a PCC-derived code capability with tight bounds, seal it as a sentry, jump into it, and confirm that executing one instruction past the capability's upper bound raises a CHERI PCC-bounds exception.
Chip-level tests that CHERI capability violations raise the correct exceptions through the CVA6-CHERI pipeline. CHERI firmware only. Both V2, placeholders registered.
Testpoints:
chip_cheri_exception(cheri_exception_test_cheri): a tag violation (dereference a capability whose tag was cleared) and a bounds violation (load one byte past the upper bound) each raise a CHERI fault; the handler confirmsmcauseencodes a CHERI exception and the offending capability register is identified in the CHERI fault-info CSR.chip_cheri_pcc_bounds(cheri_pcc_bounds_test_cheri): construct a PCC-derived code capability with tight bounds, seal it as a sentry, jump into it, and confirm that executing one instruction past the capability's upper bound raises a CHERI PCC-bounds exception.