feat(nvidia): add cutlass_scaled_mm operator#801
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July 21, 2026 09:12
cutlass_scaled_mm operator
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Summary
NvidiaCutlassCMake package or a pinned, SHA256-verifiedFetchContentarchive; no CUTLASS submodule is required.cutlass_scaled_mm(a, b, scale_a, scale_b, out_dtype, bias, out), backed by a fused CUTLASS INT8 GEMM epilogue.CutlassScaledMmin C++ andcutlass_scaled_mmin Python, matching vLLM rather than introducing a provider-neutralScaledMmalias.scale_a, scalar/per-channelscale_b, required FP16/BF16out_dtype, optional bias, padded layouts, non-default streams, and multi-GPU device restoration.Motivation
This is the first intentionally narrow third-party provider migration slice from InfiniCore into InfiniOps. It validates the dependency, build, and provider structure with one representative CUTLASS operator before additional CUTLASS operators are proposed.
The public name, parameter order through
bias, and W8A8 semantics follow vLLM's publiccutlass_scaled_mmwrapper. vLLM allocates and returns the output tensor; InfiniOps follows its repository convention by accepting that tensor as a trailing explicitoutand requiresout.dtype == out_dtype.The dependency is consumed as a private CMake target rather than a repository submodule. Source archives and sdists can therefore configure without Git submodule metadata, while offline builds can set standard CMake variables such as
NvidiaCutlass_DIRorFETCHCONTENT_SOURCE_DIR_CUTLASS.N/A - no linked issue.
API alignment
cutlass_scaled_mm(a, b, scale_a, scale_b, out_dtype, bias, out)cutlass_scaled_mm(a, b, scale_a, scale_b, out_dtype, bias=None) -> Tensor; the returned tensor is represented by trailingoutunder the InfiniOps execution conventionThis operator is not
torch.nn.functional.scaled_mm. PyTorch's public function follows the ATen_scaled_mm_v2FP8/FP4-oriented contract. This PR implements vLLM's W8A8 INT8 path: INT8 A/B, scalar or per-token A scales, scalar or per-channel B scales, required FP16/BF16out_dtype, and optional bias. The generated PyTorchinternal::_scaled_mmremains separate, and this PR does not modifyscripts/torch_ops.yaml.CUTLASS acquisition
NvidiaCutlass4.4.1 targetnvidia::cutlass::cutlassviaNvidiaCutlass_ROOT,NvidiaCutlass_DIR, orCMAKE_PREFIX_PATH087c84dfwith a fixed SHA256FETCHCONTENT_SOURCE_DIR_CUTLASS=/path/to/cutlassThe fallback only populates the source archive and exposes its headers through an interface target. It deliberately does not execute CUTLASS's top-level CMake project because CUTLASS 4.4.1 requires CMake 3.19 while InfiniOps supports CMake 3.18, and loading the subproject would also add unrelated install rules. This is the same dependency-lifecycle direction used by vLLM and TensorRT-LLM.
Type of Change
feat- new feature / new operator / new platformfix- bug fixperf- performance improvement (no behavioral change)refactor- code restructuring without behavior changetest- adding or fixing tests onlydocs- documentation onlybuild/ci- build system or CI configurationchore- tooling, formatting, or other non-code changesPlatforms Affected
WITH_CPU)WITH_NVIDIA)WITH_ILUVATAR)WITH_METAX)WITH_CAMBRICON)WITH_MOORE)WITH_ASCEND)WITH_TORCH)Smoke Test Result
Remote environment:
ssh nvidia,accelerator-dev/nvidia:latest(sha256:dd94fce2f83a180e2271f02f69713de5360aaf916b01e1f7f54173519fd54efd), NVIDIA A100-SXM4-80GB, PyTorch2.10.0a0+b4e4ee81d3.nv25.12, CUDA 13.1.Test Results on Supported Platforms
f19b654Additional dependency validation
Benchmark / Performance Impact
No performance claim in this first integration PR. Scale, bias, and output conversion are fused into the CUTLASS epilogue, so the implementation does not materialize an
M x NINT32 accumulator or launch a second post-processing kernel. Architecture-specific tile tuning should be handled in a later performance-only PR.Notes for Reviewers
CutlassScaledMm; no FlashAttention, MATE, or MoE operator is included.bias, requiredout_dtype, and W8A8 behavior follow vLLM's public wrapper; only the returned tensor is represented as trailingoutunder the InfiniOps execution convention.torch.nn.functional.scaled_mmand generatedinternal::_scaled_mmremain separate because their_scaled_mm_v2FP8/FP4 contract is not interchangeable with this W8A8 INT8 operator.cutlass.cu; only that source receives SM75 SASS/PTX flags, so existing CUDA architecture configuration for other sources is unchanged.