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LATX, AVX: avoid redundant vector copies and lane inserts #451

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LATX, AVX: avoid redundant vector copies and lane inserts #451

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35 changes: 19 additions & 16 deletions target/i386/latx/translator/tr-avx.c
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Original file line number Diff line number Diff line change
Expand Up @@ -1272,14 +1272,12 @@ bool translate_vextractf128(IR1_INST * pir1) {
uint8 imm = ir1_opnd_uimm(ir1_get_opnd(pir1, 2)) & 0x1;
if (ir1_opnd_is_xmm(ir1_get_opnd(pir1, 0))) {
IR2_OPND dest = load_freg128_from_ir1(ir1_get_opnd(pir1, 0));
IR2_OPND temp = ra_alloc_ftemp();
if (!imm) {
la_xvpermi_q(temp, src, VEXTRINS_IMM_4_0(3, 0));
la_xvpermi_q(dest, src, VEXTRINS_IMM_4_0(3, 0));
} else {
la_xvpermi_q(temp, src, VEXTRINS_IMM_4_0(3, 1));
la_xvpermi_q(dest, src, VEXTRINS_IMM_4_0(3, 1));
}
set_high128_xreg_to_zero(temp);
la_xvori_b(dest, temp, 0);
set_high128_xreg_to_zero(dest);
} else {
if (!imm) {
store_freg128_to_ir1_mem(src, ir1_get_opnd(pir1, 0));
Expand Down Expand Up @@ -1374,14 +1372,25 @@ bool translate_vinserti128(IR1_INST * pir1) {
IR2_OPND src1 = load_freg256_from_ir1(ir1_get_opnd(pir1, 1));
IR2_OPND src2 = load_freg128_from_ir1(ir1_get_opnd(pir1, 2));
uint8 imm = ir1_opnd_uimm(ir1_get_opnd(pir1, 3)) & 0x1;
IR2_OPND temp = ra_alloc_ftemp();
la_xvori_b(temp, src1, 0);
bool dest_is_src1 = ir1_opnd_base_reg_num(ir1_get_opnd(pir1, 0)) ==
ir1_opnd_base_reg_num(ir1_get_opnd(pir1, 1));
bool dest_is_src2 = ir1_opnd_is_xmm(ir1_get_opnd(pir1, 2)) &&
ir1_opnd_base_reg_num(ir1_get_opnd(pir1, 0)) ==
ir1_opnd_base_reg_num(ir1_get_opnd(pir1, 2));
IR2_OPND result = dest_is_src2 && !dest_is_src1 ?
ra_alloc_ftemp() : dest;

if (!dest_is_src1) {
la_xvori_b(result, src1, 0);
}
if (!imm) {
la_xvpermi_q(temp, src2, VEXTRINS_IMM_4_0(3, 0));
la_xvpermi_q(result, src2, VEXTRINS_IMM_4_0(3, 0));
} else {
la_xvpermi_q(temp, src2, VEXTRINS_IMM_4_0(0, 2));
la_xvpermi_q(result, src2, VEXTRINS_IMM_4_0(0, 2));
}
if (dest_is_src2 && !dest_is_src1) {
la_xvori_b(dest, result, 0);
}
la_xvori_b(dest, temp, 0);
return true;
}

Expand Down Expand Up @@ -3495,8 +3504,6 @@ bool translate_vpbroadcastd(IR1_INST *pir1)
la_xvreplve0_w(dest, src);
} else if (ir1_opnd_is_ymm(opnd0)) {
la_xvreplve0_w(dest, src);
la_xvinsve0_d(dest, dest, 2);
la_xvinsve0_d(dest, dest, 3);
} else {
lsassert(0);
}
Expand Down Expand Up @@ -6467,8 +6474,6 @@ bool translate_vpbroadcastb(IR1_INST *pir1)
la_xvreplve0_b(dest, src);
} else if (ir1_opnd_is_ymm(opnd0)) {
la_xvreplve0_b(dest, src);
la_xvinsve0_d(dest, dest, 2);
la_xvinsve0_d(dest, dest, 3);
} else {
lsassert(0);
}
Expand Down Expand Up @@ -6503,8 +6508,6 @@ bool translate_vpbroadcastw(IR1_INST *pir1)
la_xvreplve0_h(dest, src);
} else if (ir1_opnd_is_ymm(opnd0)) {
la_xvreplve0_h(dest, src);
la_xvinsve0_d(dest, dest, 2);
la_xvinsve0_d(dest, dest, 3);
} else {
lsassert(0);
}
Expand Down