LATX, AVX: write VPBLENDVB directly to the destination

[luzeng87]

Summary

• allocate the VPBLENDVB destination without loading its previous value
• write XVBITSEL.V directly to the architectural destination register
• preserve source/destination overlap and VEX.128 upper-half clearing semantics

Validation

• clean 3A6000 build: passed
• 128-bit and 256-bit blends, including destination/source overlap: passed
• VEX.128 upper-half clearing: passed
• JIT, cold AOT, and hot AOT: passed with a non-empty AOT file and empty stderr
• git diff --check: passed

[luzeng87]

Superseded by grouped AVX lowering PR #448. The original commit remains separate inside that PR for review.