ci: arch-neutral jobs run on any clean-room box (intel, yoga, gx10); workspace-test keeps X64; perf benchmarks pin intel (#3100) - #3104
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…gx10); workspace-test stays X64 for x86 SIMD coverage; perf benchmarks pin the intel box (#3100, operator P0) clean-room now spans three boxes (runner labels; runner groups keep them aprender-only). Dropping X64 from guard-tree, guard-cargo, vendored-schemas, mutants, gate and pr-review-* lets the arm64 GB10 take them; workspace-test keeps X64 so every PR still runs the x86 SIMD paths. beat-speed-nightly and nightly-bench must measure on the same hardware as their recorded baselines, so they now require the intel label — without it yoga's different CPU would silently write wrong baselines. Pmat-Ticket: PMAT-1098 Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
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September 10, 2026 17:44
…ree boxes and yoga's CPU would silently record wrong baselines (#3100) Pmat-Ticket: PMAT-1098 Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
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Operator P0 2026-09-10: aprender CI uses all three boxes. Routing lives in runner labels: yoga and gx10 carry
clean-roomin aprender-only runner groups and mirror the intel host (layout, image, pinned tools).X64from guard-tree, guard-cargo, vendored-schemas, mutants, gate, pr-review-receipt/shadow/sign — so the arm64 GB10 can take them (the CI image is now multi-arch, sovereign-ci: pin a two-architecture image index (amd64 + arm64) — identical amd64 bits, adds a native arm64 image (aprender#3100) .github#68).X64on workspace-test — every PR still runs the x86 SIMD paths; on arm64 only the NEON paths would be tested.beat-speed-nightlyandnightly-benchnow requireintel— with clean-room spanning three boxes, yoga's different CPU would otherwise silently record wrong baselines.Checks: yaml ok, check_runner_labels ok, guard_tree_test.sh 23/23, check_perf_concurrency_groups ok.
Pmat-Ticket: PMAT-1098
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