misc: fastrpc: reduce munmap error log during DSP process exit - #114
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…y link _ieee80211_set_active_links() calls _ieee80211_link_use_channel() for each newly-added link and WARN_ON_ONCE()s if it fails. The call uses assign_on_failure=true, which allows mac80211 to continue despite driver failures, but when a mac80211-level channel validation fails (e.g., combinations check, DFS, or no available radio), drv_assign_vif_chanctx() is never reached. Since ath12k_mac_vdev_create() is only called from that path, arvif->is_created remains false and arvif->ar remains NULL for the failed link. The subsequent drv_change_sta_links() call reaches ath12k_mac_op_change_sta_links(), which allocates an arsta and sets ahsta->links_map |= BIT(link_id) for the broken link before checking whether the link is ready. When the vdev was never created, only station_add() is skipped, but the link remains in links_map. Any subsequent operation iterating links_map and dereferencing arvif->ar without a NULL check will crash. Two observed examples are NULL deref in ath12k_mac_ml_station_remove() on disconnect and in ath12k_mac_op_set_key() when wpa_supplicant installs PTK keys. BUG: Unable to handle kernel NULL pointer dereference at 0x00000000 pc : ath12k_mac_station_post_remove+0x40/0xe8 [ath12k] Call trace: ath12k_mac_station_post_remove+0x40/0xe8 [ath12k] ath12k_mac_op_sta_state+0xb60/0x1720 [ath12k] drv_sta_state+0x100/0xbd8 [mac80211] __sta_info_destroy_part2+0x148/0x178 [mac80211] ieee80211_set_disassoc+0x500/0x678 [mac80211] BUG: Unable to handle kernel NULL pointer dereference at 0x00000000 pc : ath12k_mac_op_set_key+0x1f8/0x2c0 [ath12k] Call trace: ath12k_mac_op_set_key+0x1f8/0x2c0 [ath12k] drv_set_key+0x70/0x100 [mac80211] ieee80211_key_enable_hw_accel+0x78/0x260 [mac80211] ieee80211_add_key+0x16c/0x2ac [mac80211] nl80211_new_key+0x138/0x280 [cfg80211] Fix this by checking arvif->is_created before calling ath12k_mac_alloc_assign_link_sta(). This prevents the broken link from entering links_map, so all subsequent operations iterating the bitmap are protected. The reliability of arvif->is_created across all error paths is ensured by the preceding patch. Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.1.c5-00302-QCAHMTSWPL_V1.0_V2.0_SILICONZ-1.115823.3 Fixes: a27fa61 ("wifi: ath12k: support change_sta_links() mac80211 op") Link: https://lore.kernel.org/linux-wireless/20260512044906.1735821-1-wei.zhang@oss.qualcomm.com/ Signed-off-by: Wei Zhang <wei.zhang@oss.qualcomm.com> (cherry picked from commit f542adb59d7428ee3f278ca80aca382904a30fbb)
Add wcn3988-pmu node with supply regulators and bt-enable-gpios to shikra EVK board DTS files. Update the BT node supply references to use PMU-managed LDOs (vreg_pmu_io/xo/rf/ch0) instead of direct PMIC regulators, and move BT node to the board-specific shikra-evk.dtsi. Signed-off-by: Yepuri Siddu <yepuri.siddu@oss.qualcomm.com> (cherry picked from commit 1e015b8fba8f3260b6f8328ec74ae06cf5b47530)
Add gpio-reserved-ranges property to the tlmm node for all three Shikra EVK variants (CQM, CQS, IQS) to mark GPIOs used by the SoC internally and not available for general use. Signed-off-by: Anurag Pateriya <apateriy@qti.qualcomm.com> (cherry picked from commit f85e592b0c3f5e61ae47eab025b1c93da45ebd05)
Rename bt-enable-gpios to swctrl-gpios, add sw_ctrl_default pinctrl state for gpio88, and add missing vreg_pmu_ch1 (ldo4) regulator to wcn3988-pmu node across cqm-evk, cqs-evk and iqs-evk boards. Signed-off-by: Yepuri Siddu <yepuri.siddu@oss.qualcomm.com> (cherry picked from commit a1e5396e06e971b04509da73634d77848c41865e)
LT9611C(EX/UXD) is an I2C-controlled chip that Receiver signal/dual port mipi dsi and output hdmi, differences in hardware features: - LT9611C: supports 1-port mipi dsi to hdmi 1.4 - LT9611EX: supports 2-port mipi dsi to hdmi 1.4 - LT9611UXD: supports 2-port mipi dsi to hdmi 1.4/2.0 Link : https://lore.kernel.org/lkml/20260508134009.4582-3-syyang@lontium.com/ Signed-off-by: Sunyun Yang <syyang@lontium.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Mohit Dsor <mdsor@qti.qualcomm.com> (cherry picked from commit c78dc5acc49eadb967b44accbfa8b37aead3ee61)
Changes to enable lt9611uxd in lt9611c driver. Added support for port selection, enabled hdmi enable gpio and other changes. Signed-off-by: Mohit Dsor <mdsor@qti.qualcomm.com> (cherry picked from commit 1876296dd06771b2a157f65982aaf08c584d6771)
This driver provides access to LT9611C bridge driver to access Lontium LT9611UXD DSI to HDMI chip. Signed-off-by: Mohit Dsor <mdsor@qti.qualcomm.com> (cherry picked from commit ce4b9e888e6098412e046f770901c10eae838303)
Unlike the CPU, the GPU does not throttle its speed automatically when it reaches high temperatures. Set up GPU cooling by throttling the GPU speed when reaching 115°C. Signed-off-by: Aastha Pandey <aastha.pandey@oss.qualcomm.com> (cherry picked from commit ce608bd50df182f40501ca742697cbb5caed22d6)
Enable USB configfs support for UVC (USB Video Class) and UAC2 (USB Audio Class 2) function drivers in the Qualcomm ARM64 defconfig. This allows the platform to expose video and audio gadget functions via configfs, enabling use cases such as USB camera and audio device emulation over gadget mode. These options are required for test and development scenarios involving multimedia streaming over USB. Signed-off-by: Pratham Pratap <pratham.pratap@oss.qualcomm.com> (cherry picked from commit c8f71c6be43ccb516c7f1840b0b874c9b0e4fe3d)
… panel" This reverts commit 7aa3e6667b315fae478317d505b75023a51360b6. Shikra-IQS-EVK needs DSI-HDMI in place of DSI Panel. Signed-off-by: Mohit Dsor <mdsor@qti.qualcomm.com> (cherry picked from commit 4639d6f4464970b5147fdedb8a117e25246201c5)
This reverts commit 872330a93c804b1c2afede355d49f64a29e91f2d. Shikra-IQS-EVK needs DSI-HDMI in place of DSI Panel. Signed-off-by: Mohit Dsor <mdsor@qti.qualcomm.com> (cherry picked from commit e5fd4c5dab8aba0b182e60f15edcaf0b9bcd278d)
Added lt9611uxd node to iqs evk board and done changes like regulators and gpios needed for it. Signed-off-by: Mohit Dsor <mdsor@qti.qualcomm.com> (cherry picked from commit 9896f69f0a1205466ce2703a95a21f53b55968b8)
Add Last Level Cache table and configs for the Shikra SoC. Signed-off-by: Komal Bajaj <komal.bajaj@oss.qualcomm.com> (cherry picked from commit c4f07b31a7fecd9971bdfe09842de83e45b1f609)
Set ice clk rate from sdhci msm platform driver, needed for target which are having legacy ice support, and need sdhci msm platform driver to set rate. Link: https://lore.kernel.org/all/20260529081045.2877910-2-ram.gupta@oss.qualcomm.com/ Signed-off-by: Ram Prakash Gupta <ram.gupta@oss.qualcomm.com> Signed-off-by: Pradeep P V K <pradeep.pragallapati@oss.qualcomm.com> (cherry picked from commit 02b47c255b4029dd2da14e3351f46ccf40ce4194)
Switch WiFi supply nodes to PMU regulators and move power control from driver to pwrseq, aligning with the Bluetooth power model. Also remove unused dummy WLAN 3.3V regulator. Signed-off-by: Miaoqing Pan <miaoqing.pan@oss.qualcomm.com> (cherry picked from commit 94eb471718d95c27e31f0c7edf5a206aa704fa12)
Add PSCI SYSTEM_RESET2 reboot-modes for sm8750-mtp and sm8750-qrd for use by the psci-reboot-mode driver. The following modes are defined: - bootloader: reboot into fastboot mode for fastboot flashing. - edl: reboot into emergency download mode for image loading via the Firehose protocol. Link: https://lore.kernel.org/r/20260529-psci_sys_reset-dt-changes-for-pakala-v2-1-1964ebf1924c@oss.qualcomm.com Signed-off-by: Anurag Pateriya <anurag.pateriya@oss.qualcomm.com> (cherry picked from commit d7f29faab25794e50a846cbae1bc4bd450c80c14)
Add reboot-mode child nodes to shikra-evk.dtsi to configure fastboot (mode-bootloader) and EDL (mode-edl) reboot modes, since all EVK board DTS files include this shared DTSI. Signed-off-by: Anurag Pateriya <apateriy@qti.qualcomm.com> (cherry picked from commit 90df8a960d0300b35f8a7b9bbdc38c4280e32a9a)
PCIe-to-USB bridge UPD720201 does not advertise D3cold support until firmware is loaded post pci enumeration. This results in upd blocking D3cold entry during system suspend and causing overall failure to enter XO shutdown. Hence, add a quirk to advertise D3cold PME capability since the HW actually supports and advertises it post firmware loading. Link: https://lore.kernel.org/all/20260430-d3cold_support-v1-1-6734f280c481@oss.qualcomm.com/ Signed-off-by: Sushrut Shree Trivedi <sushrut.trivedi@oss.qualcomm.com> (cherry picked from commit 2557ced2fdda1e9364140ee861bf5807a331def3)
…rgets eUSB2 targets handle wakeup interrupts differently depending on device speed when operating in host mode. According to the eUSB2 specification, remote wakeup signaling in host mode is detected via different data-line assertions based on the connected device speed. When a low-speed device is connected, the host repeater drives eD+ to logic '1' upon detecting a K-state on the USB lines during remote wakeup (eUSB2 specification, Section 5.5.14). When a full-speed or high-speed device is connected, the host repeater drives eD- to logic '1' upon detecting a K-state on the USB line during remote wakeup (eUSB2 specification, Sections 5.5.15 and 5.5.18). Since the eUSB2 PHY's "DP" and "DM" interrupt lines monitor the eD+ and eD- line states, configure the wakeup interrupts accordingly Link: https://lore.kernel.org/all/20260511094422.3561509-1-krishna.kurapati@oss.qualcomm.com/ Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com> Signed-off-by: Pratham Pratap <pratham.pratap@oss.qualcomm.com> (cherry picked from commit e929e6d4fe8556b3d25732242a7e516947983723)
In order to enable combo mode on CSI1 mode, resources needs to be in shared mode. This change adds required resources under res-mgr node. Signed-off-by: Vadlamani Manjusha <mvadlama@qti.qualcomm.com> (cherry picked from commit b7de1d752e129c1883a76fa496545847834881b4)
Prevent GPIOs managed by pinctrl from being requested and freed via the GPIO framework. Restrict GPIO request/free operations to non-pinctrl GPIOs by adding appropriate conditions. Signed-off-by: Vadlamani Manjusha <mvadlama@qti.qualcomm.com> (cherry picked from commit fc647a8ed68a7d50d7cddc7111014addd57c064f)
Add remoteproc PAS loader for SoCCP with its SMP2P. On Kaanapali, it is brought up by bootloader, so set the status "okay". Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Signed-off-by: Yijie Yang <yijie.yang@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260326-knp-soccp-dt-v1-1-a60c2ae36e9b@oss.qualcomm.com (cherry picked from commit 3f9dfdaf6bb96bafb076847406e041ca1efd00cf)
Add SoCCP node on Kaanapali QRD board. Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Signed-off-by: Yijie Yang <yijie.yang@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260326-knp-soccp-dt-v1-2-a60c2ae36e9b@oss.qualcomm.com (cherry picked from commit e51c63c4d717fb80bce93d4aada0629754cbb6bf)
Add SoCCP node on Kaanapali MTP board. Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Signed-off-by: Yijie Yang <yijie.yang@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260326-knp-soccp-dt-v1-3-a60c2ae36e9b@oss.qualcomm.com (cherry picked from commit dc0c616d6302d39cd49eb3c3df0ba7e517ecfca3)
Add PSCI SYSTEM_RESET2 reboot-modes for kaanapali-mtp and kaanapali-qrd for use by the psci-reboot-mode driver. The following modes are defined: - bootloader: reboot into fastboot mode for fastboot flashing. - edl: reboot into emergency download mode for image loading via the Firehose protocol. Link: https://lore.kernel.org/all/20260529-psci_sys_reset-dt-changes-for-pakala-v1-2-7c32161cf50b@oss.qualcomm.com/ Signed-off-by: Xin Liu <xin.liu@oss.qualcomm.com> Signed-off-by: Anurag Pateriya <anurag.pateriya@oss.qualcomm.com> (cherry picked from commit 0fa62a7f1fc9497b61161a6aef4d1897995e5f84)
…n staging dtso Add CTCU, QDSS replicator, dual ETR (tmc_etr/tmc_etr1), ETR replicator, SWAO replicator, and tmc_etf out-port to complete the DDR memory trace routing path in the kaanapali staging overlay. Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com> (cherry picked from commit 02b6b2a2375321bbf98042a06371fa5369d55e4c)
…divider Add device tree bindings for the Qualcomm Peripheral Web's PDM GP_MN clock divider. The hardware generates a fractional output frequency from a fixed input clock (typically TCXO4) using the relation Fout = Fin * (M / N), with duty cycle controlled by a separate D register. The clock output is routed over a gpio controlled pin. Link: https://lore.kernel.org/r/20260602-pdm_clk_gp_mnd_v1-v1-1-1522662b6c53@oss.qualcomm.com Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> (cherry picked from commit b40e7dbd6b5ce988ec22e3428060a77adeb7c5cb)
The PDM (Pulse Density Modulation) hardware block on Qualcomm SoCs contains a GP_MN clock divider that produces a fractional output frequency from a fixed input clock (typically TCXO4): Fout = Fin * (M / N) The hardware encodes the period in the NDIV register as the 1's complement of (N - M), and controls the duty cycle via a separate DUTY register that counts the number of low-phase native clock cycles over the period N. Add a standalone platform driver for this block that uses rational_best_approximation() to find the closest M/N pair within the 9-bit M and 13-bit N hardware limits, programs the MDIV, NDIV, and DUTY registers via regmap, and implements the full clk_ops surface including determine_rate, set_rate, recalc_rate, get_duty_cycle, and set_duty_cycle. The PDM AHB bus clock is gated around every register access. Link: https://lore.kernel.org/r/20260602-pdm_clk_gp_mnd_v1-v1-2-1522662b6c53@oss.qualcomm.com Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> (cherry picked from commit a832eb6ab586eacf06f26da7a8298e320174b276)
Unlike the CPU, the CDSP does not throttle its speed automatically when it reaches high temperatures in hamoa. Set up CDSP cooling by throttling the cdsp when it reaches 105°C. Signed-off-by: Dipa Ramesh Mantre <dipa.mantre@oss.qualcomm.com> (cherry picked from commit 3a0e3a57a352718db3e2a3874d2560fcc43b4de6)
Update the path for the camera icp firmware. Signed-off-by: Chandan Kumar Jha <cjha@qti.qualcomm.com> (cherry picked from commit d8f6f41d809852c58cf61768b73f378b19cc83a9)
This reverts commits 8b7092b ("FROMLIST: pinctrl: qcom: lpass-lpi: Switch to PM clock framework for runtime PM"), d7eca95 ("FROMLIST: pinctrl: qcom: lpass-lpi: Fix GPIO register access helper return types"), cbbffab ("FROMLIST: pinctrl: qcom: lpass-lpi: Resume clocks for GPIO access") and 2cbe01a ("FROMLIST: pinctrl: qcom: lpass-lpi: Enable runtime PM hooks on remaining SoCs"). These changes are outdated and will be replaced by a newer upstream PM clock framework conversion for the LPASS LPI pinctrl driver. Signed-off-by: Aiyaz Patel <aiyapate@qti.qualcomm.com>
This reverts commits 9b88a6b ("FROMLIST: ASoC: codecs: lpass-wsa-macro: Switch to PM clock framework for runtime PM"), 4215694 ("FROMLIST: ASoC: codecs: lpass-va-macro: Switch to PM clock framework for runtime PM") and 1fc9a6e ("FROMLIST: ASoC: codecs: lpass-wsa-macro: Guard optional NPL clock rate programming"). These changes are outdated and will be replaced by a newer upstream PM clock framework conversion for the LPASS WSA/VA macro codec drivers. Signed-off-by: Aiyaz Patel <aiyapate@qti.qualcomm.com>
…runtime PM Convert the LPASS LPI pinctrl driver to use the PM clock framework for runtime power management. This allows the LPASS LPI pinctrl driver to drop clock votes when idle, improves power efficiency on platforms using LPASS LPI island mode, and aligns the driver with common runtime PM patterns used across Qualcomm LPASS subsystems. Guard GPIO register read/write helpers and slew-rate register programming with synchronous runtime PM calls so the device is active during MMIO operations whenever autosuspend is enabled. Make PINCTRL_LPASS_LPI depend on PM_CLK, since this patch introduces direct PM clock API use in the shared core. Suggested-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Ajay Kumar Nandam <ajay.nandam@oss.qualcomm.com> Signed-off-by: Linus Walleij <linusw@kernel.org> Signed-off-by: Aiyaz Patel <aiyapate@qti.qualcomm.com> (cherry picked from commit b719ede389d8a6b3fb24d3a6641fec2e46d8ff36)
…LPI SoCs The LPASS LPI core conversion to PM clock framework relies on variant drivers wiring runtime PM callbacks. Hook up runtime PM callbacks for the LPASS LPI variant drivers touched in this patch so they are prepared for the shared core conversion. This commit is a preparatory NOP on its own, as runtime PM is still disabled on these devices until the following core conversion patch. This is a mechanical per-variant driver update that relies on the same generic PM clock flow (of_pm_clk_add_clks() + pm_clk_suspend/ pm_clk_resume()) and DT-provided clocks. Runtime behavior was validated on Kodiak (sc7280). Suggested-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Ajay Kumar Nandam <ajay.nandam@oss.qualcomm.com> Signed-off-by: Linus Walleij <linusw@kernel.org> Signed-off-by: Aiyaz Patel <aiyapate@qti.qualcomm.com> (cherry picked from commit f0c565076d56407b4a1b9e75328df0f3adaa0194) [aiyapate: dropped hunks for pinctrl-milos-lpass-lpi.c, pinctrl-sdm670-lpass-lpi.c and pinctrl-sm6350-lpass-lpi.c, which are not present in this tree]
…for runtime PM Convert the LPASS WSA macro codec driver to runtime PM clock management by using the PM clock framework. Replace manual macro/dcodec/mclk/npl/fsgen clock toggling with PM clock helpers and runtime PM callbacks. Keep the SWR gate runtime PM reference from SWR clock enable until disable so autosuspend does not gate clocks while SWR is still prepared. Set autosuspend delay to 100 ms so PM-clock-managed votes are dropped soon after idle while still avoiding suspend/resume churn on short gaps. Add a PM_CLK dependency to SND_SOC_LPASS_WSA_MACRO since this patch introduces PM clock APIs. Tighten error unwind by checking pm_runtime_put_sync_suspend() in probe and by restoring regcache state if pm_clk_resume()/regcache_sync() fails. Suggested-by: Mark Brown <broonie@kernel.org> Signed-off-by: Ajay Kumar Nandam <ajay.nandam@oss.qualcomm.com> Reviewed-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com> Tested-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com> Link: https://patch.msgid.link/20260702-xo-sd-codec-v7-b4-v8-1-d39d0fdb7859@oss.qualcomm.com Signed-off-by: Mark Brown <broonie@kernel.org> Signed-off-by: Aiyaz Patel <aiyapate@qti.qualcomm.com> (cherry picked from commit cd054a6e272caa97ab808ef6f5588749a1429108 git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git)
…or runtime PM Convert the LPASS VA macro codec driver to runtime PM clock management by using the PM clock framework. Replace manual macro/dcodec/mclk/npl clock handling with PM clock helpers and runtime PM callbacks, and keep runtime PM references around fsgen clock gating so PM-clock-managed clocks remain active while fsgen is enabled. Set autosuspend delay to 100 ms so PM-clock-managed votes are dropped soon after idle while still avoiding suspend/resume churn on short gaps. Add a PM_CLK dependency to SND_SOC_LPASS_VA_MACRO since this patch introduces PM clock APIs. Improve failure unwind paths: handle runtime PM put errors in probe/fsgen paths and restore regcache state correctly on resume failure. Suggested-by: Mark Brown <broonie@kernel.org> Signed-off-by: Ajay Kumar Nandam <ajay.nandam@oss.qualcomm.com> Reviewed-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com> Tested-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://patch.msgid.link/20260702-xo-sd-codec-v7-b4-v8-2-d39d0fdb7859@oss.qualcomm.com Signed-off-by: Mark Brown <broonie@kernel.org> Signed-off-by: Aiyaz Patel <aiyapate@qti.qualcomm.com> (cherry picked from commit eb667d0fbdd38d5a800b9e7aafc9a6c14530b9bf git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git)
…r MCLK output Switch WSA MCLK output registration to devm_clk_hw_register() so the clk hw is automatically unregistered on probe failure and remove. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Ajay Kumar Nandam <ajay.nandam@oss.qualcomm.com> Reviewed-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com> Tested-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com> Link: https://patch.msgid.link/20260702-xo-sd-codec-v7-b4-v8-3-d39d0fdb7859@oss.qualcomm.com Signed-off-by: Mark Brown <broonie@kernel.org> Signed-off-by: Aiyaz Patel <aiyapate@qti.qualcomm.com> (cherry picked from commit 541735571578b84987868c5662089f73bac36895 git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git)
…alue clk_set_rate() returns 0 on success or a negative errno on failure but the WSA macro probe function is ignoring it. Check the return value and bail out of probe on failure. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Ajay Kumar Nandam <ajay.nandam@oss.qualcomm.com> Reviewed-by: Cezary Rojewski <cezary.rojewski@intel.com> Link: https://patch.msgid.link/20260715-xo-sd-codec-wsa-va-clk-set-rate-v2-1-16ca64c2b929@oss.qualcomm.com Signed-off-by: Mark Brown <broonie@kernel.org> Signed-off-by: Aiyaz Patel <aiyapate@qti.qualcomm.com> (cherry picked from commit 6173e18dd47cce430506c2f642e0b8d8db51ff1e git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git)
clk_set_rate() returns 0 on success or a negative errno on failure but the VA macro probe function is ignoring it. Check the return value and bail out of probe on failure. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Ajay Kumar Nandam <ajay.nandam@oss.qualcomm.com> Reviewed-by: Cezary Rojewski <cezary.rojewski@intel.com> Link: https://patch.msgid.link/20260715-xo-sd-codec-wsa-va-clk-set-rate-v2-2-16ca64c2b929@oss.qualcomm.com Signed-off-by: Mark Brown <broonie@kernel.org> Signed-off-by: Aiyaz Patel <aiyapate@qti.qualcomm.com> (cherry picked from commit 4fddda16f939b6ee53c6946ad71a2ea1fabf43c5 git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git)
…or runtime PM Convert the LPASS TX macro codec driver to runtime PM clock management using the PM clock framework. Replace manual macro/dcodec/mclk/npl/fsgen clock toggling with PM clock helpers and runtime PM callbacks. Keep the SWR gate runtime PM reference from SWR clock enable until disable so autosuspend does not gate clocks while SWR is still prepared. Set autosuspend delay to 100 ms so PM-clock-managed votes are dropped soon after idle while still avoiding suspend/resume churn on short gaps. Add a PM_CLK dependency to SND_SOC_LPASS_TX_MACRO since this patch introduces PM clock APIs. Tighten error unwind by checking pm_runtime_put_sync_suspend() in probe and by restoring regcache state if pm_clk_resume()/regcache_sync() fails. Co-developed-by: Ravi Hothi <ravi.hothi@oss.qualcomm.com> Signed-off-by: Ravi Hothi <ravi.hothi@oss.qualcomm.com> Signed-off-by: Ajay Kumar Nandam <ajay.nandam@oss.qualcomm.com> Link: https://patch.msgid.link/20260707-xo-sd-codec-tx-rx-v2-1-f61b4622f97f@oss.qualcomm.com Signed-off-by: Mark Brown <broonie@kernel.org> Signed-off-by: Aiyaz Patel <aiyapate@qti.qualcomm.com> (cherry picked from commit b9b23e72abef91ab4689f1467cefc2517042ab26 git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git)
…or runtime PM Convert the LPASS RX macro codec driver to runtime PM clock management using the PM clock framework. Replace manual macro/dcodec/mclk/npl/fsgen clock toggling with PM clock helpers and runtime PM callbacks. Keep the SWR gate runtime PM reference from SWR clock enable until disable so autosuspend does not gate clocks while SWR is still prepared. Set autosuspend delay to 100 ms so PM-clock-managed votes are dropped soon after idle while still avoiding suspend/resume churn on short gaps. Add a PM_CLK dependency to SND_SOC_LPASS_RX_MACRO since this patch introduces PM clock APIs. Tighten error unwind by checking pm_runtime_put_sync_suspend() in probe and by restoring regcache state if pm_clk_resume()/regcache_sync() fails. Drop the now-empty rx_macro_remove() callback since all clock cleanup is handled by PM clock framework and devm. Co-developed-by: Ravi Hothi <ravi.hothi@oss.qualcomm.com> Signed-off-by: Ravi Hothi <ravi.hothi@oss.qualcomm.com> Signed-off-by: Ajay Kumar Nandam <ajay.nandam@oss.qualcomm.com> Link: https://patch.msgid.link/20260707-xo-sd-codec-tx-rx-v2-2-f61b4622f97f@oss.qualcomm.com Signed-off-by: Mark Brown <broonie@kernel.org> Signed-off-by: Aiyaz Patel <aiyapate@qti.qualcomm.com> (cherry picked from commit b05482e7ce1b110f86b08a99768ac41e4c9e4dfa git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git)
Add flag "aggregator-rx" to the Hamoa and Purwa camera dtsi. This change enables the aggregated CSIPHY to enable the GMSL Camera and Per-port feature. Signed-off-by: Vishal Verma <vishverm@qti.qualcomm.com>
…ear scaling The UFS clock frequency and gear speed do not necessarily have a strict one-to-one correspondence on all platforms. Introduce a device tree based configuration interface that allows specifying the HS gear speed for each supported operating frequency via the "opp-level" property in the OPP table. When this property is not configured, the driver falls back to the default frequency-to-gear mapping table. Signed-off-by: Ziqi Chen <ziqi.chen@oss.qualcomm.com> Signed-off-by: Nitin Rawat <nitin.rawat@oss.qualcomm.com> Signed-off-by: Giri Prasad Goriparthi <giri.goriparthi@oss.qualcomm.com>
Assign the appropriate UFS HS gear speed levels to each OPP frequency entry in the device tree, enabling proper per-frequency gear scaling (G1 at 75MHz, G3 at 150MHz, G5 at 300MHz). Signed-off-by: Nitin Rawat <nitin.rawat@oss.qualcomm.com> Signed-off-by: Giri Prasad Goriparthi <giri.goriparthi@oss.qualcomm.com>
…m-kernel This repository was renamed from pkg-linux-qcom-canonical to ubuntu-qcom-kernel. The uses: reference to the reusable build-kernel.yml workflow on main still pointed at the old repository name. GitHub redirects the old name, so this was not causing failures yet, but it should not rely on that redirect indefinitely. Signed-off-by: Bjordis Collaku <bcollaku@qti.qualcomm.com>
Reference the reserved memory region for audio PD dynamic loading and remote heap requirements. Add the required VMID list for memory ownership transfers. Link: https://lore.kernel.org/all/20260629-hamoa-remoteheap-v1-1-aa868b7a6e65@oss.qualcomm.com/ Signed-off-by: Ekansh Gupta <ekansh.gupta@oss.qualcomm.com> Signed-off-by: Jianping Li <jianping.li@oss.qualcomm.com>
Flatten usb controller nodes and update to using latest bindings and flattened driver approach. Tested this patch on CRD platform. For testing purpose, modified dr_mode property and added usb-role-switch property to the 3 super speed capable DRD controllers and valdiated both host and device mode. Also validated host mode on the multiport controller. Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260323103119.1801139-1-krishna.kurapati@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This reverts commit 3f88068. Disable HLOS memory dump table setup.
…0NB-A001 Add the BOE 0x0b21 panel entry used in the K&D Technology KD116N36-30NB-A001 eDP LCM, place the EDID here for subsequent reference. Timing values come from the KD116N36-30NB-A001 spec. 00 ff ff ff ff ff ff 00 09 e5 21 0b 00 00 00 00 01 1e 01 04 a5 1a 0e 78 0a 24 10 97 59 54 8e 27 1e 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 b2 39 80 d4 70 38 4b 40 30 20 36 00 04 8c 10 00 00 1a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 1a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 fe 00 51 56 31 31 36 46 48 42 2d 4e 38 31 0a 00 b3 Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260901-edp-id-boe-v1-1-f5e2c44255f7@oss.qualcomm.com
FROMLIST: media: qcom: iris: add firmware debug logging support
…evel FROMLIST: scsi: ufs: ufs-qcom: Add specified gear support for multi gear scaling
Revert "UBUNTU: [Config] enable QCOM memdump"
QCLINUX: arm64: dts: qcom: Add flag to enable aggregated CSIPHY
FROMLIST: drm/panel-edp: Add support for BOE panel used in KD116N36-3…
…devel FROMLIST: arm64: dts: qcom: hamoa: add audio PD remote heap region
…sb-dt UPSTREAM: arm64: dts: qcom: hamoa/purwa: Flatten usb controller nodes
X0 shutdown fix audio
A munmap request can race with userPD teardown on the DSP: the heap GC thread issues the reverse unmap after the process group has already been released. Depending on how far teardown has progressed, the DSP returns either AEE_ENOSUCHPROCESS (0x80000441), when the process group is already gone, or AEE_EBADSTATE (0x8000040d), when the listener has been torn down and the reverse RPC can no longer be delivered. In both cases the memory is still reclaimed by the DSP process release path, so these are expected conditions during process exit rather than mapping failures. Log them at debug level instead of error level to avoid noise in dmesg. Signed-off-by: Jianping Li <jianping.li@oss.qualcomm.com>
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Please post to upstream and merge on qcom-next first. |
Tingwei Zhang (quic-tingweiz)
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A munmap request can race with userPD teardown on the DSP: the heap GC thread issues the reverse unmap after the process group has already been released. Depending on how far teardown has progressed, the DSP returns either AEE_ENOSUCHPROCESS (0x80000441), when the process group is already gone, or AEE_EBADSTATE (0x8000040d), when the listener has been torn down and the reverse RPC can no longer be delivered.
In both cases the memory is still reclaimed by the DSP process release path, so these are expected conditions during process exit rather than mapping failures. Log them at debug level instead of error level to avoid noise in dmesg.
canonical issue: https://bugs.launchpad.net/carmel/+bug/2165033