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Add TI LAUNCHXL-F28P55X (C2000 C28x) bare-metal wolfCrypt example#576

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Add TI LAUNCHXL-F28P55X (C2000 C28x) bare-metal wolfCrypt example#576
dgarske wants to merge 1 commit into
wolfSSL:masterfrom
dgarske:ti_c25

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@dgarske dgarske commented Jun 18, 2026

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New embedded/ti-c2000-f28p55x/ example for the TMS320F28P550SJ (C28x DSP, CHAR_BIT==16). Scoped bare-metal build (cl2000) demonstrating, validated on hardware: SHA-256/384/512(+512-224/256), SHA-3, SHAKE128/256; ML-DSA-87 verify, keygen and sign (make SIGN=1); and ECDSA + ECDH P-256 via SP math (make ECC=1). ML-DSA verify uses the smallest-mem streaming verifier. Includes BSP/startup, SCIA + JTAG-RAM logging, linker scripts, KAT headers, a wolfcrypt test/benchmark harness, a stack-usage profiler, and a 'make compile-ci' guard. Needs a wolfSSL checkout with the CHAR_BIT!=8 fixes (set WOLFROOT).

New embedded/ti-c2000-f28p55x/ example for the TMS320F28P550SJ (C28x DSP,
CHAR_BIT==16).  Scoped bare-metal build (cl2000) demonstrating, validated on
hardware: SHA-256/384/512(+512-224/256), SHA-3, SHAKE128/256; ML-DSA-87 verify,
keygen and sign (make SIGN=1); and ECDSA + ECDH P-256 via SP math (make ECC=1).
ML-DSA verify uses the smallest-mem streaming verifier.  Includes BSP/startup,
SCIA + JTAG-RAM logging, linker scripts, KAT headers, a wolfcrypt test/benchmark
harness, a stack-usage profiler, and a 'make compile-ci' guard.  Needs a
wolfSSL checkout with the CHAR_BIT!=8 fixes (set WOLFROOT).
@dgarske dgarske self-assigned this Jun 18, 2026
Copilot AI review requested due to automatic review settings June 18, 2026 00:13

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Pull request overview

Adds a new bare-metal wolfCrypt bring-up example targeting the TI LAUNCHXL-F28P55X (TMS320F28P550SJ / C28x, CHAR_BIT==16), with a scoped algorithm set and on-device known-answer tests plus optional ECC SP-math smoke tests.

Changes:

  • Introduces a C28x board-support main() that runs SHA-2/SHA-3/SHAKE KATs, ML-DSA-87 verify (and optional sign), and integrates wolfcrypt test/benchmark harnesses.
  • Adds build scaffolding for TI CGT + C2000Ware (Makefile, ccxml, linker command files, user_settings.h).
  • Adds embedded KAT vector headers for ML-DSA-87 verify and ECDSA P-256 verify.

Reviewed changes

Copilot reviewed 10 out of 10 changed files in this pull request and generated 13 comments.

Show a summary per file
File Description
embedded/ti-c2000-f28p55x/Source/wolf_main.c Bare-metal entry point, UART/JTAG logging hooks, timer timebase, KATs, ML-DSA verify/sign demo, optional ECC tests
embedded/ti-c2000-f28p55x/Source/mldsa87_kat.h ML-DSA-87 public key + signature KAT vectors for on-target verification
embedded/ti-c2000-f28p55x/Source/ecc_p256_kat.h RFC 6979-based deterministic ECDSA P-256 verify KAT inputs
embedded/ti-c2000-f28p55x/Header/user_settings.h wolfSSL/wolfCrypt configuration tailored for C28x (CHAR_BIT==16) and scoped algorithm set
embedded/ti-c2000-f28p55x/Makefile Headless cl2000 build for scoped wolfCrypt subset + optional ECC/sign modes
embedded/ti-c2000-f28p55x/README.md Usage/build/run notes, 16-bit-byte pitfalls, memory/layout guidance
embedded/ti-c2000-f28p55x/28p55x_wolf_flash_lnk.cmd Flash build linker layout (stack/heap/RAM region allocations)
embedded/ti-c2000-f28p55x/28p55x_wolf_sign_lnk.cmd Alternate linker layout for ML-DSA sign build with large heap
embedded/ti-c2000-f28p55x/ccxml/F28P550SJ.ccxml CCS target configuration for XDS110 + F28P550SJ
embedded/ti-c2000-f28p55x/.gitignore Ignores build output artifacts

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Comment on lines +94 to +98
#ifdef WOLF_MLDSA_SIGN
volatile char g_log[2048];
#else
volatile char g_log[12288];
#endif
Comment on lines +30 to +32
* The C28x has no hardware TRNG, so my_rng_seed_gen() is a DEV-ONLY counter
* seed - NOT secure. ML-DSA verify and the hash tests are deterministic and
* do not consume it.

## RNG caveat

The F28P55x has **no hardware TRNG**. `my_rng_seed_gen()` in `wolf_main.c` is a **development-only** counter seed so the benchmark's RNG-gated cases link and run -- it is **not** cryptographically secure. ML-DSA verify and the hash tests are deterministic and consume no RNG output. For a no-RNG build you can instead define `WC_NO_RNG` (the ML-DSA verify *test* still runs; the verify *benchmark* is then skipped).
Comment on lines +10 to +12
* stack must live below 0x10000. RAMLS0-7 (0x8000..0xBFFF, 16 KW) is the
* largest contiguous low block; the verify key struct (~7 KW pinned by
* WOLFSSL_MLDSA_VERIFY_NO_MALLOC) plus Keccak frames live here.
Comment on lines +280 to +284
int ret;
int res;
int verified;
int ok;
word32 i;
Comment on lines +344 to +345
mp_clear(&r);
mp_clear(&s);
Comment on lines +348 to +363
ret = wc_ecc_init(&keyB);
if (ret == 0) {
ret = wc_ecc_make_key_ex(&rng, 32, &keyB, ECC_SECP256R1);
}
if (ret == 0) {
ret = wc_ecc_set_rng(&keyB, &rng);
}
lenA = (word32)sizeof(secretA);
lenB = (word32)sizeof(secretB);
if (ret == 0) {
ret = wc_ecc_shared_secret(&keyA, &keyB, secretA, &lenA);
}
if (ret == 0) {
ret = wc_ecc_shared_secret(&keyB, &keyA, secretB, &lenB);
}
ok = (ret == 0) && (lenA == lenB) && (lenA > 0);
Comment on lines +371 to +373
wc_ecc_free(&keyB);
wc_ecc_free(&keyA);
wc_FreeRng(&rng);
## Memory notes

- Clock: 150 MHz from the 20 MHz crystal Y2 (`device.h` `DEVICE_SETCLOCK_CFG`), flash `RWAIT=3`. Confirm the Y2 frequency against the board silkscreen.
- The C28x stack pointer is 16-bit, so the stack must live below address `0x10000`. `28p55x_wolf_flash_lnk.cmd` puts a 12 KW stack in RAMLS0-7, a 12 KW heap in RAMGS0-1, and `.bss`/`.data` in the high RAMGS2-3 / RAMLS8-9 blocks.

- `NO_HMAC` / `NO_ASN`: relax if the test/benchmark harness references them unconditionally in this scoped path.
- If the link reports unresolved `XMALLOC` from a non-gated test path, raise the heap size or switch to a static-memory pool.
- `WC_16BIT_CPU`: off by default (ML-DSA/SHA use explicit `word32`/`word64`); enable only if int-width build errors appear.
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2 participants