LATX, AVX: reduce temporary vectors in instruction lowering

[luzeng87]

Summary

Group small AVX lowering changes that remove temporary vectors without changing architectural results:

• write packed float-to-integer conversions directly to the destination
• use direct saturating narrowing and rounded multiply instructions
• avoid redundant copies in extract, insert, and broadcast translations
• write VPBLENDVB directly to its destination
• use direct widening multiply-add sequences for VPMADDWD and VPMADDUBSW
• write byte shifts and immediate shuffles directly when aliases permit

Correctness

Each lowering keeps an alternate temporary path where source/destination overlap requires it. Tests cover aliasing, MXCSR rounding modes, saturation boundaries, NaN and overflow inputs, lane selection, and VEX.128 upper-half clearing.

Validation

• individual instruction fixtures: passed on native x86 and LoongArch
• JIT, cold AOT, and hot AOT modes: passed with non-empty AOT files
• deterministic packing and multiply fixtures: 100,000 input sets passed
• DCO sign-offs present on all commits

This PR supersedes the separate narrowing, vector-copy, blend, multiply-add, and shuffle PRs. It remains a draft while grouped checks run.

[luzeng87]

Superseded by the consolidated #438 draft. Its AVX lowering changes and focused alias, rounding, saturation, multiply, and shuffle tests are retained there.